SEMATECH Dictionary of Semiconductor Terms
A-Am | An-Az | B | C-Ch | Ci-Com | Con-Cz | D-De | Df-Dz | E-En | Eo-Ez | F-Fl
Fm-Fz | G | H | I | J-K | L | M-Mes | Met-Mz | N | O | P-Ph | Pi-Pq | Pr-Pz | Q | R
S-Se | Sh-So | Sp-Sta | Ste-Sz | T-Th | Ti-Tz | U-V | W-Z
"B"
back end-of-line (BEOL) n |
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process steps from contact through completion of the wafer prior to electrical test. Also called back end. [SEMATECH] |
| backgrind n |
an operation using an abrasive on the back side of a substrate to achieve the necessary thinness for scribing, cutting, and packaging of die. [SEMATECH] |
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| background n |
in the bar code marking of silicon wafers, the uniform, lighter or more reflective region that provides contrast for the darker bars of a bar code symbol, including the "quiet zones." [SEMI T1-93] |
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| background counts n |
in particle counting, signal of particle counts that is observed during analysis of a particle-free standard test specimen. Background particle counts include electronic noise, particles contributed by the test apparatus, and signals induced by surface roughness. [SEMATECH] |
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| back oxide n |
a layer of silicon dioxide formed on the back of a wafer during oxidation. [SEMATECH] |
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| back plate n |
in a flat panel display, for a panel that consists of two plates of glass (or substrates) bonded together, the plate farthest from the viewer of the display. [SEMI D4-94] |
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| backside |
see back surface. |
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| back surfacen |
of a semiconductor wafer, the exposed surface opposite to that on which active semiconductor devices have been or will be fabricated. [ASTM F1241] Also called backside. |
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| bake n |
in wafer manufacturing, a process step in which a wafer is heated in order to harden resist, remove moisture, or cure a film deposited on the wafer. [SEMATECH] |
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| balancing n |
in equipment exhaust systems, adjustments made after the ventilated equipment and the ventilation system are installed to ensure that air flow to each piece of ventilated equipment is within design specifications. [SEMI S6-93] |
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| ball grid array (BGA) n |
an integrated circuit surface mount package with an area array of solder balls that are attached to the bottom side of a substrate with routing layers. The die are attached to the substrate using die and wire bonding or flip-chip interconnection. [SEMATECH] Also called land grid array, pad grid array, or pad-array carrier. ] |
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| ball valve n |
a shutoff valve of the packed type that incorporates a round, internal dynamic member, or "ball," and containing one or more through holes that connect the ports of the valve to each other. [SEMI International Standards 1990, Vol. 1, Glossary] Also see packed valve. |
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| bandwidth n |
the difference between the highest and lowest values in a range of two pattern characteristics, such as efficiency, frequency, or impedance. The bandwidth of significant frequencies (frequencies that conform to standards or that are required for reliable frequencies) within a spectrum is expressed in hertz. [SEMATECH] |
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| banking pins n |
in flat panel display, round elements in a positioning fixture that define a coordinate system origin, and against which a substrate is placed for processing or inspection. [SEMI D4-94] |
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| bar |
see die, crossbar, and bar end. |
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| bar code n |
in the bar code marking of silicon wafers, an array of parallel rectangular bars and spaces that together represent data elements of characters in a particular symbology. The bars and spaces are arranged in a predetermined pattern following unambiguous rules defined by the symbology, that is, BC-412. [SEMI T1-93] |
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| bar code character n |
in the bar code marking of silicon wafers, a single group of bars and spaces that represent an individual number, letter, punctuation mark, or other symbol. [SEMI T1-93] |
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| bare die n |
individual, unpackaged silicon integrated circuits. [1994 National Technology Roadmap for Semiconductors] |
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| bar end n |
1 : in the bar code marking of silicon wafers, the darker or less reflective element of a bar code symbol. [SEMI T1-93] 2 : of a wafer carrier, see crossbar. |
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| bar radius n |
in plastic and metal wafer carriers, the radius nearest the bar end of the carrier on the crossbar. [SEMI E1-86] |
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| barrier n |
a physical layer designed to prevent intermixing of the layers above and below the barrier layer; for example, titanium-tungsten and titanium-nitride layers. [SEMATECH] |
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| barrier layer |
see depletion layer. |
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| bar web n |
in plastic and metal wafer carriers, the mass of material for structural support that may or may not be present on the crossbar. [SEMI E1-86] . |
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| bar width n |
in plastic and metal wafer carriers, the distance or thickness of the bar when measured perpendicular to the top face. [SEMI E1-86] Also see crossbar. |
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| base n |
1 : in semiconductor manufacturing chemicals, a substance that dissociates in water to liberate hydroxyl ions, accepts a proton, has an unshared pair of electrons, or reacts with acid to form a salt. A base has a pH greater than 7 and turns litmus paper blue. [SEMATECH] 2 : in facilities and safety, a corrosive material with the chemical reaction characteristic of an electron donor. [SEMI S4-92] 3 : in quartz and high temperature carriers, the material at the bottom of a wafer carrier on which the wafer carrier rests when placed on a flat surface. [SEMI E2-93] 4 : of a cerdip or cerpack package, the bottom ceramic portion. A leadframe, a window frame, and the cap are attached to the base-generally with devitrifying solder glass-during package/device manufacture. [SEMI G1-85] |
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| BASE council |
see TQM-BASE Council. |
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| base end to first slot n |
in quartz and high temperature wafer carriers, the distance from either end of the base of a wafer carrier to the first slot. [SEMI E2-86] |
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| base length n |
in plastic and metal wafer carriers, the length of the base of a wafer carrier from end to end. [SEMI E2-86] |
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| baseline n |
a specification or product that has been formally reviewed and agreed on, which thereafter serves as a basis for further development and can be changed only through formal change control procedures. (Copyright 1993 IEEE. All rights reserved.) |
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| base side to wafer center line n |
in plastic and metal wafer carriers, the horizontal distance from the vertical wafer center line to either side of the base. [SEMI E2-86] |
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| base step height n |
in quartz and high-temperature wafer carriers, the distance from the bottom plane to the widest point of the base. [SEMI E2-86] |
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| base width n |
in quartz and high-temperature wafer carriers, the outside dimension of the base from side to side. [SEMI E2-86] |
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| basic cell n |
an arrangement of features or groups, as defined by SEMI P19-92, based on a specific nominal feature dimension. [SEMI P19-92] |
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| batch n |
1 : one or more sets of data or programs accumulated for processing in one noninteractive job. [SEMATECH] 2 : a group of wafers intended for a process sequence, as opposed to single-wafer processing. [SEMATECH] |
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| bay n |
of a cleanroom, a confined area that contains equipment used for one or more steps in a process. [SEMATECH] |
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| bead n |
an individual spherical particle of an ion-exchange resin material. [SEMATECH] |
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| behavior n |
in object-oriented technology, how an object acts and reacts. [SEMATECH] |
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| behavioral n |
a level of logic design that involves describing a system at a level of abstraction that does not involve detailed circuit elements, but instead expresses the circuit functionality linguistically or as equations. [1994 National Technology Roadmap for Semiconductors] |
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| bell jar n |
a glass, quartz, or stainless steel chamber used to isolate substrates in a subatmospheric environment for deposition or etch. [SEMATECH] |
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| bellows valve n |
a packless valve that incorporates a statically sealed bellows to isolate the controlled medium from the atmosphere. [SEMI Chemicals/Gases, Vol. 1, 1990 (no longer in print)] |
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| benchmarks n |
standard circuits or tests that can be used to compare the performance of software programs or tools. Each program or tool is applied to the benchmark circuit and the results compared. [1994 National Technology Roadmap for Semiconductors] |
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| bend radius n |
of a fluorocarbon tube, the distance from the center of an imaginary circle on which the arc of the bent tube falls to a point on that arc. [SEMI F9-92] |
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| BEOL |
see back end-of-line. |
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| best focus n |
in the testing of photolithographic instruments, the position of a processed image surface in which the best compromise of focus across the whole of the processed image is obtained, as defined by the application requirements for the processed image. [SEMI P25-94] |
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| beta distribution |
see Pearson distribution. |
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| beta test n |
performance testing done on a pilot production version of a process tool installed at customer sites. The testing is performed by customers and monitored by the manufacturer's applications engineering group. No design changes are made during the testing period. [SEMATECH] |
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| bevel angle n |
the smaller of the angles between the wafer surface and the section plane. [ASTM F1241] |
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| BGA |
see ball grid array. |
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| BHT |
see Brinell hardness test. |
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| biCMOS design n |
the combination of bipolar and complementary metal oxide semiconductor design and processing principles on a single wafer or substrate. [SEMATECH] |
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| bidirectional adj |
in the bar code marking of silicon wafers, refers to a bar code that can be read successfully in either scanning direction, right to left or left to right. [Adapted from SEMI T1-93] |
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| bimetal mask |
see mask, bimetal. |
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| bin n |
of particle measurement instruments, a subset of the total range of particles counted, based on size. Many particle counting instruments measure the size of a particle while counting and then sort the total number of counts into bins. Some instruments have the size ranges of the bins set at the factory, while some designs allow the user to set the ranges of the bins. [SEMATECH] Also called channel. |
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| binary intensity mask (BIM) n |
a mask consisting of patterned areas that transmit or do not transmit, for example, the common chrome-on-quartz mask. [SEMATECH] |
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| binary value n |
in the dot matrix code marking of silicon wafers, a dot in the wafer surface indicates the binary value 1. The absence of a dot, or a smooth surface surrounding a cell center point, indicates the binary value 0. [SEMI T2-93] |
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| binding energy n |
the value obtained by subtracting the instrumentally measured kinetic energy of an electron from the energy of the incident photon, corrected for an instrument work function. [SEMATECH] |
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| biodegradable adj |
pertains to an organic material capable of decomposition as a result of attack by microorganisms. [SEMATECH] |
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| biofilm n |
a collection of microorganisms, extracellular polymeric products, and organic matter located at the interface in solid-liquid, gas-liquid, or liquid-liquid biphasic systems. [SEMATECH] |
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| bipolar adj |
a semiconductor device fabrication technology that produces transistors which use both holes and electrons as charge carriers. [SEMI M1-94 and ASTM F1241] |
|
| bipolar transmission |
see polar transmission. |
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| bird's beak n |
a structural feature produced as a result of the lifting of the edges of the nitride layer during subsequent oxidation. [SEMATECH ] |
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| birefringence n |
a double-refraction phenomenon in which an unpolarized beam of light is divided into two beams with different directions and relative velocities. [ASTM F1241] |
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| BIST |
see built-in self test. |
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| blister ceramic n |
an enclosed, localized separation within or between the layers of a ceramic package that does not expose an underlying layer of ceramic or metallization. [SEMI G61-94] Also called bubble ceramic. |
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| blister metal n |
in packaging, an enclosed, localized separation of a metallization layer from its base material (such as ceramic or another metal layer) that does not expose the underlying layer. [SEMI G8-94] Also called bubble metal, blister metallization, and bubble metallization. Also see package. |
|
| block n |
in message transfer, a physical division of a message (a complete unit of communication). NOTE-In SECS-I, each block has a block header (a 10-byte data element used by the message and transaction protocols) and up to 244 bytes of data. For compatibility with SECS-I, SECS-II also recognizes the same block length for data; however, in SECS-II there is only a message header, not a header for each block. [SEMI E4-91 and E5-92] |
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| blocking layer |
see depletion layer. |
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| block length n |
in message transfer, the number of bytes sent in the block transfer protocol. [SEMI E4-91] |
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| block-level adj |
describes a high-level architectural schematic of a system or function that hides detail and displays a collection of circuit elements as a single block. [1994 National Technology Roadmap for Semiconductors] |
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| block number n |
a 15-bit field in the header for the numbering of blocks in a message. [SEMI E4-91] Also see multiblock message. |
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| block structure |
see cell structure. |
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| block transfer protocol n |
in message transfer, the SECS-I procedure used by a serial line to establish the direction of communication and to provide the environment for passing message blocks. NOTE-A block consists of a 10-byte header plus up to 244 bytes of data. [SEMI E4-91] Also see message protocol. |
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| boat |
see quartz carrier. |
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| boat map n |
a drawing that shows the relative location of product, test, and dummy wafers in a diffusion cycle. [SEMATECH] |
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| boiling point (bp) n |
the temperature of a liquid at which the vapor pressure equals the prevailing atmospheric pressure. The normal boiling point is specified at one atmosphere. [SEMI Chemicals/Gases, Vol. 1, 1990 (no longer in print)] |
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| bondability n |
surface conditions (cleanliness) of a bonding area that provide a capability for successfully bonding an interconnection material. [SEMATECH] |
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| bonded process n |
a manufacturing-oriented technique to build silicon on insulator substrates. The process involves bonding two oxidized wafers together then thinning the top or active layer to the desired thickness. [SEMATECH] |
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| bond finger n |
1 : in ceramic packages, an area of refractory metal that has been plated, usually with gold, and is intended for wire bonding. [SEMI G39-89] Also see lead flat surface. 2 : the area of leadframes designated for the attachment of bonding wires between the bond pads on the die and the leadframe. [SEMI G39-89] |
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| bonding area n |
in packaging, the area of a leadframe designated for the attachment of small diameter bonding wires from the bonding pads on the die to the leadframe. These areas are often coined if the leadframes are stamped to provide a flat surface for bonding. The designated area does not necessarily correspond to the physical dimensions of the bond finger. [SEMI G2-87] Also see lead flat surface and package. |
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| bonding pads |
n relatively large metal areas on a die used for electrical contact with a package or probe pins. [SEMATECH] |
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| booties n |
conductive shoe covers worn to reduce contamination in a cleanroom. [SEMATECH] |
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| border column n |
in the dot matrix code marking of silicon wafers, the outermost column of a dot matrix. [SEMI T2-93] |
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| border row n |
in the dot matrix code marking of silicon wafers, the outermost row of a dot matrix. [SEMI T2-93] |
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| boron (B) n |
a nonmetal that is also a p-type dopant for silicon. The most common source of boron is the gas diborane (B2H6). [SEMATECH] |
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| boron implant n |
the operation whereby boron atoms are accelerated and injected into the surface of a wafer or substrate. The species are physically implanted into the bulk of the silicon to create a locally conductive p-type area. [SEMATECH] |
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| boron trichloride (BCl3) n |
a colorless gas at room temperature and atmospheric pressure. Boron trichloride fumes in the presence of moist air and has a choking odor. This gas is used as a gas etchant of metals such as aluminum. It also is used in boron doping. [SEMI C3.33-87] |
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| boron trifluoride (BF3) n |
a colorless gas that fumes in moist air and has a pungent odor. This gas is nonflammable and does not support combustion. It is toxic when inhaled and is corrosive to the skin. Boron trifluoride is used in ion implantation and doping. [SEMI C3.27-88] |
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| bottom formed width n |
in packaging, the widest spread of the leads, measured to the outside of the lead or foot, after lead forming. [SEMI G2-94] Also see leadframe and package. |
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| bottom plane n |
in a wafer carrier, a horizontal plane tangent to the base. [SEMI E2-93] |
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| bottom protrusions |
see top or bottom protrusions. |
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| boundary scan n |
a scan path that allows the input/output pads of an integrated circuit to be both controlled and observed. [1994 National Technology Roadmap for Semiconductors] |
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| bow n |
of a semiconductor wafer, the deviation of the center point of the median surface of a free, unclamped wafer from a median-surface reference plane established by three points equally spaced on a circle with diameter a specified amount less than the nominal diameter of the wafer. [ASTM F1241] Contrast flatness. Also see warp. |
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| box n |
an environmentally controlled enclosure for a cassette containing wafers or disks. A box includes a box door and box latches. [SEMI E19.4-94] Also called container. |
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| box door n |
a removable bottom for the box that contains a means (such as registration holes) for properly positioning the wafer cassette. [SEMI E19.4-94] |
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| box latches n |
for wafers less than or equal to 150 mm, mechanical latches that hold the box door in position until activated by the latch pins. Upon activation, a portion of each box latch engages a latch cavity and smaller, thereby locking the box to the port plate. [SEMI E19-91] |
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| braze v |
1 : to join two metals together through the use of a third metal or alloy at or above 427 degrees C (800 degrees F). The braze material alloys with each of the two metals that do not alloy with each other. Leads and seal rings may be brazed to designated nickel plated, refractory metallization areas of the package. [SEMATECH] Contrast solder. 2 n : a material used for brazing, usually a silver/copper (72/28) alloy with a melting point of 779 degrees C. [SEMATECH] |
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| bridge n |
1 : a defect in which two adjacent areas connect because of misprocessing such as poor lithography, particle contamination, underdevelop, or etch problems. [SEMATECH] Also called short. 2 : software that allows access to, and combination of, data from incompatible databases. [SEMATECH] |
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| bridged interface n |
a general term for the interconnection between legacy systems. [SEMATECH] |
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| bridging fault n |
a fault modeled as a short-circuit between two nets on a die. [1994 National Technology Roadmap for Semiconductors] |
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| brightfield illumination n |
(transmission electron microscopy) : the illumination of an object so that it appears on a bright background. [ASTM E7-93] |
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| Brinell hardness test (BHT) n |
an indentation hardness test using calibrated machines to force a hard ball, under specified conditions, into the surface of the material under test and to measure the diameter of the resulting impression after removal of the load. [ASTM E6-89] |
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| bronchitis n |
an acute or chronic inflammation of the mucous membrane of the tracheobronchial tree. [SEMATECH] |
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| browse v |
to view the components of a structure through a user interface that allows easy navigation through the links connecting objects in the structure. [SEMATECH] |
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| browser n |
a basic tool for the manipulation of a repository; , displaying its objects, links and attributes. The browser also acts as a repository editor, allowing the creation and deletion of objects, modification of links and attributes, etc. [SEMATECH] |
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| BTAB |
see bumped tape automated bonding. |
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| bubble n |
a spherical defect formed by air or other gas included in a substrate or film. [ASTM F127-84] |
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| bubble ceramic |
see blister ceramic. |
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| bubble fluid n |
a liquid, containing soap or other bubble-generating medium, designed to detect leaks from inside a piping system to atmosphere. [SEMI Chemicals/Gases, Vol. 1, 1990 (no longer in print)] |
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| bubble metal/metallization |
see blister metal. |
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| buffer n |
1 a program routine or storage device that compensates for unequal data flow rates or event timing differences during the transfer of data between devices. [SEMATECH] 2 : a substance added to a solution to attain higher consistency of solution strength over time. [SEMATECH] |
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| buffered hydrofluoric acid n |
an extremely hazardous corrosive used to etch silicon dioxide from a wafer. This acid has a 20- to 30-minute reaction delay after contact with skin or eyes. [SEMATECH] |
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| built-in self test (BIST) n |
any of the methods of testing an integrated circuit (IC) that uses special circuits designed into the IC. This circuitry then performs test functions on the IC and signals whether the parts of the IC covered by the BIST circuits are working properly. [1994 National Technology Roadmap for Semiconductors] |
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| bulk gases n |
common gases, such as nitrogen, hydrogen, oxygen, and argon that are used in such large quantities in wafer fabrication that they are pumped or piped into the facility. [SEMATECH] |
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| bulk processes n |
semiconductor processes affecting the bulk silicon, for example, silicon materials, implant, cleans and thermal processes. [SEMATECH] |
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| bumped tape automated bonding (BTAB) n |
the preparation of a raised bump site, usually gold or tin, at each bond site on tape bonding material. [SEMATECH] Also see tape automated bonding. |
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| bunny suit n |
a total-body garment worn by personnel in a cleanroom to reduce release of particles and contaminants into the air. [SEMATECH] |
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| buried contact n |
a conductive region between two less conductive regions. [SEMATECH] |
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| buried layer n |
1 : a conductive layer between two less conductive films; for example, a localized n+ region in a p-type wafer that reduces the npn collector series resistance for integrated circuit transistors fabricated in an n-type epitaxial layer deposited on the p-type wafer. [SEMATECH] 2 : in epitaxial silicon wafers, a diffused region in a substrate that is, or is intended to be, covered with an epitaxial layer. [SEMI M18-94 and ASTM F1241] Also called subdiffused layerand diffusion under film. |
|
| burn-in n |
the process of exercising an integrated circuit at elevated voltage and temperature. This process accelerates failure normally seen as "infant mortality" in a chip. The resultant tested product is of high quality. [1994 National Technology Roadmap for Semiconductors] |
|
| burr n |
1 : an adherent fragment of parent material at a component edge. In leadframes, due to the stamping operation, the metal burr may be in a horizontal or vertical direction relative to the surface. In ceramic packages, this type of characteristic is called a fin. [SEMI G58-94] 2 : in cerpack packages, a fragment of excess material or foreign particle adhering to the surface. [SEMI G34-89] |
A-Am | An-Az | B | C-Ch | Ci-Com | Con-Cz | D-De | Df-Dz | E-En | Eo-Ez | F-Fl
Fm-Fz | G | H | I | J-K | L | M-Mes | Met-Mz | N | O | P-Ph | Pi-Pq | Pr-Pz | Q | R
S-Se | Sh-So | Sp-Sta | Ste-Sz | T-Th | Ti-Tz | U-V | W-Z


